DFM (Design for Manufacturability) Services

Please contact freedfm@murrietta.com for more information.

DFMPWB Manufacturing

Level 1: Basic PWB design verification

  • Signal Layers Checks
    • Spacing - reports spacing violations between pads, circuits and nets, and between text to text. Also reports shorts and spacing between different CAD nets and close distances between non-touching features on same CAD or layer nets.
    • Drill - report distance violations between NPTHs/PTHs/Vias to pads, annular rings and copper. Also reports missing pads.
    • Rout - report distance violations between edge of rout outlines to copper features.
    • Size - reports sizes of pads, lines, shaved lines, text, line neckdown, arcs and shaved arcs.
  • Power/Ground Checks
    • Drill - reports distance violations between NPTHs/PTHs/Vias to plane, copper, clearances and annular rings.
    • Rout - reports on close spacing between copper/clearances and rout features.
    • Spacing - reports on spacing between features of different planes (split plane), between pads and pads to planes.
  • Solder Mask Checks
    • Drill - reports close distances to solder mask openings of PTH/NPTH annular rings, and where NPTH touches mask.
    • Pads - reports close distances to solder mask openings of all pads, including un-drilled pads. It also reports solder mask overlap on features.
    • Coverage - reports lines that are too close to clearances that is not adequately covered.
  • Silk Screen Checks
    • S/M clearance - reports close distances between silkscreen features and solder mask clearances.
    • SMD clearance - reports close distances between silkscreen and surface mount/BGA pads.
    • Pad clearance - reports close distances between silkscreen and THR. hole pads.
    • Lines width - report line width violations and length to width ratio violations.
  • Drill Checks
    • Hole Size - provide a list of hole aspect ratio for all PTH, NPTH, and vias.
  • Rout Checks
    • Size - report board length, board width and board thickness.

Level 2: Full PWB design verification (all level 1 services included)

  • Signal Layers Checks
    • Stubs - reports unconnected line endpoints.
    • Sliver - report on slivers between lines and pads or between pads and pads.
    • Center - report misregistration of PTH/Vias pads to drill.
    • SMD - list surface mounts/BGA pad sizes, and identifies SMD packages.
    • Bottleneck - reports thin copper surfaces.
  • Power/Ground Checks
    • Sliver - reports in slivers in negative or positive layers.
    • Thermal - reports on spoke (tie) widths and reduction of connectivity of thermal features.
  • Solder Mask Checks
    • Rout - reports close distances between solder mask and rout features.
    • Bridge - reports different net pads without solder mask bridges (dams).
    • Sliver - reports slivers between solder mask clearances.
    • Spacing - reports close spaces between clearances (wider than sliver).
  • Silk Screen Checks
    • Hole clearance - reports close distances between silk screen and drill holes.
    • Rout clearances - report close distances between silk screen and rout features.
  • Drill Checks
    • Hole separation - reports duplicated holes, touching holes and close holes.
    • Missing holes - report missing drills for non-SMD pads.
    • Extra holes - report redundant drills that do not belong to any pad.
    • Power/ground shorts - reports drills touching large copper nets of more than one P&G layer.
    • NPTH to rout - report drills that are close to the rout path.
  • Rout Checks
    • Spacing - report features to rout and features to panelization Step & Repeat.

Level 3: Full PWB design verification + full planning review (all level 2 services included)

  • Manufacturing Drawing Analysis - feedback on manufacturing drawing and notes.
  • Lamination Construction - includes lamination stack-up diagram
  • MRP Analysis - material requirements planning for odd lot and special order materials; highlighting any special order items.
  • Impedance - calculations (if necessary) to verify values.
  • Process Flow Diagram - full build plan with process flow diagrams showing the sequence of the entire build cycle.

PCB Assembly

Level 1: Basic design verification

  • Fudicial Verification (qty, presence/absence, design of)
  • Solder - mask dams for fine pitch SMT
  • Component to component spacing, component to board edge spacing.

Level 2: Full design verification + full planning review (all level 1 services included)

  • Assembly Drawing Analysis - feedback on Assembly drawing and notes.
  • Panel Analysis
    • Determine whether a panel is required.
    • If so, then recommend panel size, # of ups, break-away method, tooling hole and fudicial locations, with special considerations for connector installations and overall panel rigidity.
    • Cross analysis with board manufacturing for maximum PWB panel utilization, while maintaining maximum efficiency for PCB assembly.
  • Basic BOM Scrub (compares qty per to ref des, vice-versa)
  • CAD ASCII / BOM Comparison - compares the BOM to the Board and vice-versa. Compares Footprint sizes on BOM to actual CAD ASCII data (when footprint sizes are provided within the BOM).

Level 3: Full DFM + detailed BOM scrub & turnkey quote (all level 2 services included)

  • Detailed BOM Scrub - same as basic BOM Scrub, plus: item description match to mfg part number callout, mfg part number validation with suppliers.
  • Price and lead time analysis
  • Itemize long-lead items, obsolete components, recent end-of-life notices, etc.